Senior Power Integrated Circuit Design Engineer. San Francisco Bay Area California

Senior Power Integrated Circuit Design Engineer.

Provide technical responsibilities in the development of integrated circuits using CMOS/Bipolar analog/digital circuitry.

Technical responsibilities include: circuit design (mostly digital, some analog), simulation, layout supervision and verification, preparation of test plan for the test group, product characterization, bench to test correlation, bench evaluation both at the silicon level and at the applications level, and documentation. Job responsibilities involve the ability to communicate with all levels and other groups, and requires having good verbal and written communications skills. Engineer must be interested in learning, be a creative problem solver, innovate solutions, be adaptable, and accept criticism.

REQUIREMENTS:

Education:
BSEE required – MSEE preferred with emphasis on Digital and Analog Integrated Circuit (IC) Design.

Experience:
MSEE or BSEE with minimum 5+ years in Analog IC Design

Some Analog IC Design, and high voltage AC/DC technical experience is preferable.

Solid understanding of digital design, RTL synthesis, verilog AMS, system verilog, and familiarity of analog circuit blocks and device physics.

Please share your CVs/Resumes at wazeerkhanusllc@gmail.com for immediate Review

Thank you & Regards

Wazeer Khan LLC

C. 401496-0205